The End of the Nanometer Era
As the nanometer era in semiconductor manufacturing nears its end, industry leaders like Taiwan Semiconductor Manufacturing Company (TSMC) and Samsung are progressing towards more advanced chip technologies. TSMC is reportedly planning to establish a 1nm fabrication facility in Taiwan's Chiayi Science Park, marking a significant leap from the current 3nm and upcoming 2nm technologies.
While cutting-edge chips are advancing to smaller nanometer processes, it's expected that simpler microcontrollers and legacy integrated circuits will continue using larger, more traditional process nodes for some time. Samsung is also advancing with its 3nm production and has plans for a 2nm process in 2025, while Intel's next-generation 20 angstrom technology (about two nanometers) is expected to debut this year.
The terminology used to describe these advancements, however, has evolved from a literal to a more symbolic meaning. Previously, nanometers referred to the physical gate length of planar transistors, but with the adoption of FinFET transistors around 2011, this metric became less representative of actual transistor size. Intel's recent rebranding of its process technology, changing its 10nm to “Intel 7” and 7nm to “Intel 4”, underlines this shift.
While partly a marketing strategy to align with competitors like TSMC and Samsung, it also reflects a broader industry trend where nanometer measurements are more about indicating relative improvements in transistor density rather than precise physical dimensions.
This shift complicates comparisons between different foundries' technologies, as there's no standardized way to equate one company's process tech with another's.
